(1) Field of the Invention
This invention relates the alignment of a mask to a wafer during photolithographic processing and more particularly to alignment of a mask to a wafer without using optical alignment.
(2) Description of the Related Art
Alignment of mask images to integrated circuit wafers is critical in photolithographic processing of integrated circuit wafers. This alignment is usually performed with reference to alignment marks formed in the wafer. Detection of these alignment marks after a number of process steps can become difficult and time consuming.
U.S. Pat. No. 5,403,754 to Jackson describes a method of alignment of a number of layers so that the alignment of each layer is optimized with respect to the other layers.
U.S. Pat. No. 5,740,065 to Jang et al. describes a method of processing semiconductor wafers which averages data from a number of previous steps and extracts correction conditions for succeeding steps.
U.S. Pat. No. 5,733,711 to Juengling describes a method of forming both fixed and variable patterns on a single photoresist layer.
U.S. Pat. No. 5,792,580 to Tomimatu describes a method of aligning a mask to a wafer by defining shot regions on the wafer and a laser step alignment mark is formed in each shot region.
U.S. Pat. No. 5,153,678 to Ota describes a method of aligning a mask to a wafer.
U.S. Pat. No. 4,780,617 to Umatate et al. describes a method of aligning a mask to a wafer.